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Experience and Skills:
The person should be comfortable in using
1. Sigrity Power SI
2. ADS
3. HSPICE
4. Cadence Schematic and layout tool
5. HFSS will be an added advantage.
Responsibilty:
The candidate should be able to work with PI engineers, Silicon, and the Package team. The primary role will be a simulation for power integrity. Need to extract from layout SPARAM file and run the simulation in the Spice simulation-environment. Should be in a position to deliver results to the PI lead engineer. The typical parameter will be voltage droop, power supply noise, Load line, etc
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